1. Field of the Invention
The invention relates to a phase shifting mask (PSM) process, and particularly to an automated flow in PSM phase assignment.
2. Description of the Related Art
In designing an integrated circuit (IC), engineers typically rely upon computer-implemented tools to help create a circuit schematic design consisting of individual devices coupled together to perform a certain function. To fabricate this circuit in a semiconductor substrate on a wafer, the circuit must be translated into a physical representation, called a layout. Computer-aided design (CAD) tools can assist layout designers in the task of translating the discrete circuit elements into geometric shapes (called features) on the layout. After this translation, the layout (or portions thereof) can be transferred onto a physical template, i.e. a mask/reticle.
A mask (usually a quartz plate coated with chrome) is generally created for each layer of the IC design. In less complicated and dense ICs, each mask comprises the features that represent the desired circuit pattern for its corresponding layer. In more complicated and dense ICs in which the size of the features approach the optical limits of the lithography process, the masks may also comprise sub-wavelength, optical proximity correction (OPC) structures, such as serifs, hammerheads, bias and assist bars, which are designed to compensate for proximity effects.
These masks are then used to project their patterns onto the wafer coated with photoresist material. For each layer of the design, a light (visible/non-visible radiation) is shone on the mask corresponding to that layer. This light passes through the clear regions of the mask, whose image exposes the underlying photoresist layer, and is blocked by the opaque regions of the mask, thereby leaving that underlying portion of the photoresist layer unexposed. The exposed photoresist layer is then developed, typically through chemical removal of the exposed/non-exposed regions of the photoresist layer. The result is a wafer coated with a photoresist layer exhibiting the desired pattern, which defines the features of that layer. This lithographic process is then repeated for each layer of the design.
One advance in lithography called phase shifting is able to generate features on the wafer that are smaller than the corresponding wavelength of the light. These ultra-small features are generated by the destructive interference of light in adjacent, complementary pairs of phase shifters having opposite phase, e.g. 0 and 180 degrees. In one embodiment, the phase shifters can be formed on a phase shifting mask (PSM), which is used in conjunction with a binary mask including the above-described features of the layout. In the PSM, complementary phase shifters (hereinafter referred to as shifters) are configured such that the exposure radiation transmitted by one shifter is 180 degrees out of phase with the exposure radiation transmitted by the other shifter. Therefore, rather than constructively interfering and merging into a single image, the projected images destructively interfere where their edges overlap, thereby creating a clear and very small image between the phase shifters.
FIG. 1A illustrates a view 190 of one portion of a phase shifting mask (PSM) superimposed on a corresponding portion of a layout. The layout includes three features 191, 194, and 197, wherein each feature could implement a gate of a transistor. Shifters 192 and 193 are associated with feature 191, shifters 195 and 196 are associated with feature 194, and shifters 198 and 199 are associated with feature 197. Note that these shifters can be light transmissive areas on an otherwise opaque PSM mask (assuming a dark field mask)(and noting that the opaque portion is not shown so as not to obscure features 191, 194, and 197).
Without shifters 192, 193, 195, 196, 198, and 199, the projection of features 191, 194, and 197 onto the wafer would be limited by the resolution of the optical process. However, if the light of a single wavelength passing through one of the shifters, e.g. shifter 192, is out of phase (by 180 degrees or n radians) with the light of the same wavelength passing through the other shifter, e.g. shifter 193, then an interference pattern is set up on the wafer. (For ease of reference, shifters of a different phase are indicated with a different fill pattern.) This interference generates a printed feature having a width that is less than the width that could be achieved using only feature 191 on a binary mask.
A phase conflict can exist if two shifters have an undesirable lithographic result. For example, in view 190, shifters 192 and 195 could create a printed feature on the wafer where no feature is desired; however, the printed feature may be acceptable if it can be removed by a second exposure. Shifter pairs 193/196 and 193/199 could produce similar, undesirable printing results, which cannot be removed because the conflict requires the same location on the phase shifting mask to have two different phases. Similarly, the phase conflict caused by shifters 178 and 179 cannot be resolved using current phase shifter design rules. Therefore, those phase shifters could be removed from the PSM. In some instances, a more efficient and cost-effective process for production environments would eliminate the phase conflicts themselves.
Currently, tools for assigning phase to shifters analyze the layout using cells. For example, view 190 shows a shared edge 189 between one cell including feature 191 and its associated shifters 192/193 and a portion of feature 197 and its associated shifters 198/199 and another cell including feature 194 and its associated shifters 195/196 and a portion of feature 197. Note that the term xe2x80x9ccellxe2x80x9d can have various meanings. For example, a cell can refer to shapes or portions thereof in a layout that fall within an analysis pattern used by the tool. FIG. 1B illustrates one analysis pattern, i.e. a grid of uniform squares, which defines cells 151-159. In another embodiment, the analysis pattern can define non-uniform cells. For example, FIG. 1C illustrates another analysis pattern that defines non-uniform cells 161-166. In yet another embodiment, a cell can be defined by a predetermined set of shapes (features, shifters, etc.) that are associated with one or multiple layers.
Shapes within a cell are treated with one rule set, wherein the rule set includes sizing and positioning of the shapes. FIG. 1D illustrates a simplified layout for a transistor including a gate 185 (which could be defined by a binary mask), a diffusion area 186 (which could be defined by an n-well mask), and shifters 183 and 184 (which could be defined by a PSM). Exemplary parameters in a rule set for this layout could include an endcap margin 181 (measured from an edge of diffusion area 186 to the end of gate 185), a fieldcap margin 182 (measured from an opposite edge of diffusion area 186 to a line connected to gate 185), and a shifter width 187. Other parameters could, for example, shifter length and a minimum spacing between shifters.
Selecting the value of the parameters can significantly change the resolution of the printed features defined by the cell. For example, wide shifters provide better printing resolution than narrow shifters. Additionally, large endcap and fieldcap margins provide better printing resolution than small endcap and fieldcap margins. A rule set including parameter values that can provide better lithographic performance is considered xe2x80x9cmore aggressivexe2x80x9d than a rule set including parameter values that can provide less optimal lithographic performance. Therefore, to optimize printing resolution, the most aggressive rule set possible should used for each cell in the layout.
Unfortunately, using an aggressive rule set to optimize printing resolution can generate more phase conflicts than if a less aggressive rule set is used. In a layout with many cells, wherein each cell includes hundreds or even tens of thousands of features, the probability of phase conflict using an aggressive rule set is high.
Automated tools that assign, i.e. size and place, shifters for a layout attempt to provide optimal printing resolution and eliminate phase conflicts. However, cell-by-cell methodologies automatically resort to a less aggressive rule set for an entire cell even if only a single phase conflict is created with a more aggressive rule set.
For example, FIG. 1E illustrates a cell-by-cell methodology for assigning a rule set to each cell. Step 101 determines whether all cells in the layout have been phase shifted. If not, then step 102 attempts to phase shift the next cell with the most aggressive rule set, i.e. the 1st rule set. Step 103 determines whether a phase conflict would be created using the 1st rule set. If not, then that cell is phase shifted using the 1st rule set in step 104 and the process returns to step 101. If a phase conflict is created using the 1st rule set, then step 105 attempts to phase shift the cell with a less aggressive rule set, i.e. the 2nd rule set. Step 106 determines whether a phase conflict would be created using the 2nd rule set. If not, then that cell is phase shifted using the 2nd rule set in step 107 and the process returns to step 101.
If a phase conflict is still created using the 2nd rule set, than consecutively less aggressive rule sets are used until the process reaches the last rule set. Specifically, step 108 attempts to phase shift the cell with the last rule set. Step 109 determines whether a phase conflict would be created using the last rule set. If not, then that cell is phase shifted using the last rule set in step 110 and the process returns to step 101.
If at least one phase conflict is still created using the last rule set, then the tool implementing the process can notify the user that phase assignment using the existing rule sets was unsuccessful in step 111. At this point, the user can manually modify the layout to resolve the remaining phase shift conflict(s). However, this manual modification is extremely time consuming as well as tedious, thereby making it highly undesirable in the production environment.
Note that even if all cells have been phase shifted successfully, as determined in step 101, a phase conflict between cells may still exist. At this point, a process 112 similar to steps 102-111 can be followed to resolve any inter-cell phase conflicts. In other words, if a phase conflict exists between two adjacent cells, then one of the two cells is phase shifted with the next lower rule set until that phase conflict is resolved. In one embodiment, the process can begin with the cell with the higher rule set, assuming that the cells have been phase shifted with different rule sets. In another embodiment, one of the two cells is arbitrarily chosen to be phase shifted with the lower rule set.
Because even a single phase conflict in a cell can result in a lower rule set being applied to that cell, the most aggressive rule sets are rarely applied in many designs. It logically follows, correspondingly, that the best printing resolution for such designs can rarely be achieved. Therefore, a need arises for a system and method of applying aggressive rule sets more frequently, thereby improving lithographic performance.
In accordance with one aspect of the invention, fully automated phase assignment of an integrated circuit layout can be provided in a production environment. Regions of a cell in the layout can be analyzed and phase shifted independently from other regions of the cell, thereby allowing more features to benefit from fabrication using phase shifters defined according to more aggressive rule sets. In this manner, the printing resolution of many features can be significantly improved.
In one embodiment, a method of applying rule sets to a layout can include dividing the layout into a plurality of cells and allowing the use of multiple rule sets within a cell. A number, such as the number of phase conflicts in a cell or the percentage of phase conflicts (i.e. the number of phase conflicts in the cell divided by a total number of features in the cell), can be determined by a program, guidelines, and/or a user. This number can then be compared to a predetermined limit, wherein the predetermined limit indicates a maximum permissible number of phase conflicts that can exist in a cell before another less aggressive rule set is used for the cell.
If the number is less than or equal to the predetermined limit, then any area of phase conflict can be masked. At this point, the rest of the cell, e.g. the unmasked portion, can be phase shifted using the most aggressive rule set. An attempt can then be made to apply a less aggressive rule set to the masked areas.
If no phase conflict occurs using the less aggressive rule set, then the masked areas can be phase shifted using that less aggressive rule set. If at least one phase conflict occurs, then consecutively less aggressive rule sets can be tried, until the number of phase conflicts is less than or equal to a predetermined limit. Note that each rule set can have an associated predetermined limit. Then, the non-phase conflict areas can be phase shifted with the current rule set. The process repeats attempting to phase shift the remaining phase conflict areas with the next lower (i.e. less aggressive) rule set. This process can be repeated for each cell.
Advantageously, this method can significantly reduce the area of analysis for each rule set. Thus, the most aggressive rule set(s) possible can be used for each analyzed area. Moreover, because multiple areas of each cell can be analyzed, more aggressive rule sets can be used more frequently for phase assignment in the layout. In this manner, lithographic performance can be significantly improved compared to methodologies that can only apply one rule set to a cell.
Inter-cell phase conflicts can be resolved by analyzing an area associated with the shared edge between the cells. In one embodiment, an area encompassing both cells can be analyzed. In another embodiment, an area in only one cell can be analyzed. The method of determining the number of phase conflicts and comparing that number to a predetermined limit can be used in either embodiment.
A mask fabricated using this methodology can include different endcap margins, fieldcap margins, or shifter widths within a single predefined (e.g. rectangular) area of the mask. A wafer fabricated with a mask exhibiting such varied parameters could include transistor gates having different endcap margins, fieldcap margins, and lengths, all gates being within an area of the wafer corresponding to the predefined area of the mask. A wafer fabricated with this mask exhibits enhanced lithographic performance. Specifically, allowing the application of multiple rule sets in a cell of the layout can optimize the resolution of the printed features on the wafer defined by that cell. Obtaining the best possible resolution for the printed features can provide a corresponding improvement in yield and process latitude for the wafer.
A system for providing phase assignment can include a computer and a tool running on the computer. The tool can include means for dividing the layout into a plurality of cells and means for automatically applying rule sets to any cell.
A computer program product can include a computer usable medium having a computer readable program code embodied therein for causing a computer to automatically modify a layout including phase assignment. The computer readable program code includes computer readable program code that can assign multiple rule sets to each cell, if appropriate, in the layout.